This invention relates to an integrated semiconductor arrangement comprising a high-frequency power amplifier stage.
An amplifier stage is known from the publication entitled: "GaAs IC Direct-Coupled Amplifiers" by D. HORNEBUCKLE in the "1980 IEEE/MTT Symposium Digest pp. 387-389". This document describes a three-transistor amplifier stage whose high-frequency input is connected to the gate of the first transistor arranged as an inverter, the drain of this first transistor being direct-coupled to the gate of a second transistor. The drain of this second transistor is direct-coupled to a D.C. supply voltage V.sub.DD and the source of this second transistor is coupled across diodes to the drain of a fourth transistor whose gate and short-circuited source are coupled to a negative D.C. supply voltage. This same drain is connected to the gate of a third transistor arranged as an inverter. The high-frequency output is realised at the drain of the latter transistor. This circuit has the disadvantage of being unstable at high frequency and also of generating oscillations. This is due to the fact that it is constituted by a transistor arranged in a common drain configuration followed by a transistor arranged in a common source configuration. This document also points out that the reflection coefficient at the input of the circuit having a 50 Q load is more than 1. In effect, a negative resistance appears at the input of this circuit, which is not desirable for an amplifier.
A power amplifier stage is also known from the publication entitled "GaAs FET Principles and Technology by James V. DILORENZO, pp. 230 to 347". This document specifically describes a power amplifier stage comprising a field-effect transistor of the interdigitated type formed by a plurality of gate fingers interleaved between drain and source fingers. Increasing the output power of such a component is realised by extending the number of gate fingers, drain and source fingers. By the size of the transistor is to be understood the width of the gate which is also proportional to the number of gate fingers.